1 introduction to digital design methodology
1.1 design methodology��an introduction
1.2 ic technology options
1.3 overview
references
2 review of combinational logic design
2.1 combinational logic and boolean algebra
2.2 theorems for boolean algebraic minimization
2.3 representation of combinational logic
2.4 simplification of boolean expressions
2.5 glitches and hazards
2.6 building blocks for logic design
references
problems
3 fundamentals of sequential logic design
3.1 storage elements
3.2 flip-flops
3.3 busses and three-state devices
3.4 design of sequential machines
3.5 state-transition graphs
3.6 design example: bcd to excess-3 code converter
3.7 serial-line code converter for data transmission
3.8 state reduction and equivalent states
references
problems
4 introduction to logic design with verilog
4.1 structural models of combinational logic
4.2 logic system, design verification, and test methodology
4.3 propagation delay
4.4 truth table models of combinational and sequential logic with verilog
references
problems
5 logic design with behavioral models of combinational and sequential logic
5.1 behavioral modeling
5.2 a brief look at data types for behavioral modeling
5.3 boolean equation-based behavioral models of combinational logic
5.4 propagation delay and continuous assignments
5.5 latches and level-sensitive circuits in verilog
5.6 cyclic behavioral models of flip-flops and latches
5.7 cyclic behavior and edge detection
5.8 a comparison of styles for behavioral modeling
5.9 behavioral models of multiplexers, encoders, and decoders
5.10 dataflow models of a linear-feedback shift register
5.11 modeling digital machines with repetitive algorithms
5.12 machines with multicycle operations
5.13 design documentation with functions and tasks: legacy or lunacy?
5.14 algorithmic state machine charts for behavioral modeling
5.15 asmd charts
5.16 behavioral models of counters, shift registers, and register files
5.17 switch debounce, metastability, and synchronizers for asynchronous signals
5.18 design example: keypad scanner and encoder
references
problems
6 synthesis of combinational and sequential logic
7 design and synthesis of datapath controllers
8 programmable logic and storage devices
9 algorithms and architectures for digital processors
10 architectures for arithmetic processors
11 postsynthesis design tasks
a verilog primitives
b verilog keywords
c verilog data types
d verilog operators
e verilog language formal syntax
f verilog language formal syntax
g additional features of verilog
h flip-flop and latch types
i verilog-2001, 2005
j programming language interface
k web sites
l web-based resources
index